`timescale 1ns / 1ps

module tb_bcc_cmd;

    // Testbench signals
    reg clk;
    reg rst_n;
    reg fun0_en;
    reg fun1_en;
    reg fun2_en;
    reg fun3_en;
    reg fun4_en;
    reg [31:0] count;
    reg [15:0] cmd_parameter;

    wire device_0;
    wire device_1;
    wire clear_signal;

    // Instantiate the design under test (DUT)
    bcc_cmd uut (
        .clk(clk),
        .rst_n(rst_n),
        .fun0_en(fun0_en),
        .fun1_en(fun1_en),
        .fun2_en(fun2_en),
        .fun3_en(fun3_en),
        .fun4_en(fun4_en),
        .count(count),
        .cmd_parameter(cmd_parameter),
        .device_0(device_0),
        .device_1(device_1),
        .clear_signal(clear_signal)
    );

    // Clock generation
    initial begin
        clk = 0;
        forever #5 clk = ~clk; // 10ns clock period
    end

    // Test scenarios
    initial begin
        #5;
        // Initialize signals
        rst_n = 0;
        fun0_en = 0;
        fun1_en = 0;
        fun2_en = 0;
        fun3_en = 0;
        fun4_en = 0;
        count = 32'd0;
        cmd_parameter = 16'd0;

        // Reset
        #10 rst_n = 1;

        // Test fun0_en (全部开启)
        #10;
        fun0_en = 1;
        #10;
        fun0_en = 0;
        #1000;

        // Test fun1_en (全部关闭)
        #10;
        fun1_en = 1;
        #10;
        fun1_en = 0;
        #1000;

        // Test fun2_en (清零)
        #10;
        fun2_en = 1;
        #10;
        fun2_en = 0;
        #1000;

        // Test fun3_en (开始计数控制)
        #10;
        cmd_parameter = 16'd10;
        fun3_en = 1;
        #10;
        fun3_en = 0;

        // Simulate counting process
        #10;
        count = 32'd5; // Below cmd_parameter
        #100;
        count = 32'd9; // Below cmd_parameter
        #100;
        fun2_en = 1;
        #10;
        fun2_en = 0;
        #100;
        count = 32'd15; // Exceeds cmd_parameter

        // Test default state
        #10;
        fun4_en = 1;
        #10;
        fun4_en = 0;

        // End simulation
        #50 $stop;
    end

endmodule
